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Research
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Publication
Highlights
Highlights 카테고리
전체
2025
2024
2023
2022
2021
2020
2019
2018
Total 13건
1 페이지
2025
13
"Bandgap-Engineered Boron Oxynitride Tunneling Layer for Reliable PLC operation of 3D V-NAND Flash Memory Devices"
Dae Hyun Kang, Jaejoong Jeong, Youngkeun Park, Yungjun Kim, Dong Hun Sin, Han Mei Choi and Byung Jin Cho,
2025 IEEE International Electron Devices Meeting (IEDM),
December 2025.
LINK
12
"Backside Ferroelectric-Assisted Charge Trap Flash (BF-CTF) Device for a Wide Memory Window and Read Disturbance-Free Performance"
Jaejoong Jeong, Yeeun Kim, Youngkeun Park, Jong Kyung Park, Byung Jin Cho,
IEEE Electron Device Letters,
August 2025.
LINK
11
"Hydrogen-stable Top-gate Self-aligned a-IGZO TFT with Tungsten Nitride Barrier on Source/Drain"
Heetae Kim , Hoseok Lee , Heesu Kim , Jungwoo Bong , Chihun Sung, Jeho Na , Bada Kim, Min Ju Kim , Keun Heo , Sung Haeng Cho and Byung Jin Cho,
IEEE Electron Device Letters,
November 2025.
LINK
2024
10
"Overcoming Performance Limitation of IGZO FET by iCVD Fluorine Doping "
Seung Hyun Oh, Chang Hyeon Lee, Hee Tae Kim, Jeong Ik Park, Min Ju Kim, Se Jun Park, Sung Gap Im, Sung Haeng Cho and Byung Jin Cho,
2024 Symposium on VLSI Technology and Circuits (2024 VLSI) ,
June. 2024.
9
"Spatial Charge Trap Engineering with Boron Nitride Barrier for 3D V-NAND Flash Memory"
Dae Hyun Kang, Jae Joong Jeong, Young Keun Park, Dong Hun Sin, Han Mei Choi and Byung Jin Cho,
2024 International Electron Devices Meeting (IEDM),
Dec. 2024.
2023
8
"Epitaxial Strain Control of HfxZr1-xO2 with Sub-nm IGZO Seed Layer Achieving EOT=0.44 nm for DRAM Cell Capacitor"
Seongho Kim, Young Keun Park, Gyu Soup Lee, Eui Joong Shin, Woon San Ko, Hi Deok Lee, Ga Won Lee, and Byung Jin Cho,
2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits),
June. 2023.
LINK
2022
7
"Channel Mobility Boosting in a Poly-Si Channel Using Ge Diffusion Engineering and Hydrogen Plasma Treatment"
Tae In Lee, Min Ju Kim, Eui Joong Shin, Gyusoup Lee, Jaejoong Jeong, Yun Hee Lee, Jung Hoon Lee, Jaeduk Lee, and Byung Jin Cho,
IEEE Electron Device Letters,
Jan.2022.
2021
6
"Method to Achieve the Morphotropic Phase Boundary in HfxZr1-xO2 by Electric Field Cycling for DRAM Cell Capacitor Applications"
Seongho Kim, Seung Hwan Lee, Min Ju Kim, Wan Sik Hwang, Hyun Soo Jin and Byung Jin Cho,
IEEE Electron Device Letters,
Feb. 2021.
2020
5
"High Quality N+/P Junction of Ge Substrate Prepared by initiated CVD Doping Process"
Jae Hwan Kim, Sung Won Shin, Tae In Lee, Wan Sik Hwang, and Byung Jin Cho,
2020 Symposia on VLSI Technology and Circuits,
July. 2020.
4
"Capacitance Boosting by Anti-Ferroelectric Blocking Layer in Charge Trap Flash Memory Device"
Eui Joong Shin, Sung Won Shin, Seung Hwan Lee, Tae In Lee, Min Ju Kim, Hyun Jun Ahn, Jae Hwan Kim, Wan Sik Hwang, Jaeduk Lee, and Byung Jin Cho,
2020 IEEE International Electron Devices Meeting (IEDM 2020),
Dec. 2020.
2019
3
"H2 high pressure annealed Y-doped ZrO2 gate dielectric with an EOT of 0.57 nm for Ge MOSFETs"
T. I. Lee, M.C. Nguyen, H. J. Ahn, M. J. Kim, E. J. Shin, W. S. Hwang, H.Y. Yu, R. Choi, and B. J. Cho,
IEEE Electron Device Letters,
40,
1350-1353,
Sep. 2019.
2018
2
"Selective Pore-Sealing of Highly Porous Ultralow-k dielectrics for ULSI Interconnects by Cyclic Initiated Chemical Vapor Deposition Process"
Seong Jun Yoon, Kwanyong Pak, Hyun Jun Ahn, Alexander Yoon, Sung Gap Im, and Byung Jin Cho,
2018 Symposium on VLSI Technology,
June 18-22, 2018..
1
"Conformal, Wafer-Scale and Controlled Nanoscale Doping of Semiconductors Via the iCVD Process"
Jae Hwan Kim, Hong Keun Park, Kwan Yong Pak, Alex Yoon, Yun Sang Kim, Sung Gap Im, Wan Sik Hwang, and Byung Jin Cho,
2018 IEEE International Electron Devices Meeting (IEDM 2018),
Dec. 2018.
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