Interface configuration and Fermi-level pinning of fully silicided gate and high-K dielectric stack
- Journal
- J. Vacuum sci. & technol. B
- Year
- 2006
M. S. Joo, C. S. Park, B. J. Cho, N. Balasubramanian, and D. L. Kwong, "Interface configuration and Fermi-level pinning of fully silicided gate and high-K dielectric stack," J. Vacuum sci. & technol. B, vol. B24 (3), pp. 1341-1343, May/Jun 2006.