Abstract

 Nanosecond annealing using a pulsed green laser is proposed to activate the source/drain of top-tier p-channel metal-oxide-semiconductor field-effect transistors (pMOSFETs) while avoiding the degradation of pre-existing bottom-tier devices. Localized high temperatures generated by green laser annealing (GLA) in the top-tier layer improve crystallinity and increase the activated boron concentration in the source/drain of top-tier pMOSFETs compared to conventional rapid thermal annealing (RTA). These improvements result in a reduction of sheet resistance (R_sh) and specific contact resistivity (ρ_c), thereby increasing the effective mobility (µ_eff) of the top-tier Ge pMOSFETs by approximately 46 %. As a result, heterogeneous 3D sequential CFETs integrated using GLA achieve a high voltage gain (V_gain) of 68 V/V.