Valley-engineered ultra-thin silicon for high-performance junctionless transistors
- Journal
- Scientific Reports
- Year
- 2016
Seung-Yoon Kim, Sung-Yool Choi, Wan Sik Hwang, and Byung Jin Cho, "Valley-engineered ultra-thin silicon for high-performance junctionless transistors", Scientific Reports, vol. 6, no. 3, pp. 29354, Jun. 2016.
