Abstract

 We propose a novel surface treatment tech-nique using a few La₂O₃ ALD cycles to improve the per-formance and reliability of FeFET-based non-volatile memory devices. The interfacial layer formed by a few La₂O₃ ALD cycles prior to the deposition of the HfZrO (HZO) ferroelectric layer on the silicon substrate, acts as a diffusion barrier, reducing the number of trap sites in the gate stack. The La₂O₃ interfacial layer also creates an im-print effect by forming interface dipoles between the HZO and Si. This reduces the switching voltage (V_sw) and in-creases program efficiency. Compared to the conventional SiO₂ interlayer (IL), this approach significantly improves performance and reliability, resulting in an increase in the memory window (MW) from 1.1 V to 2.4 V and an increase in electron mobility from 105 cm²/V∙s to 382 cm²/V∙s, compared to the control sample. Endurance of 3 × 10⁷ cycles and improved retention characteristics were also achieved.