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Barrier Engineering of Silicon-Doped Boron Nitride in the Charge Trap Layer for High Performance 3D V-NAND Flash Memory
Journal
IEEE Transactions on Electron Devices
Vol
73
Page
2730 - 2734
Author
Dae Hyun Kang, Jaejoong Jeong, Youngkeun Park, Dong Hun Sin, Han Mei Choi and Byung Jin Cho
Year
2026
Date
March 2026

Abstract

 This work introduces silicon-doped boron nitride (BN) as an engineered energy barrier that suppresses the dead zone effect and improves spatial charge trapping efficiency. Silicon was incorporated into BN by in-situ ALD super-cycles, and the resulting Si-N bonds in BN generate higher density and deeper depth of electron traps. Energy band structure and Arrhenius analysis confirm the increase in electron trap depth, while device characteristics indicate enhanced trapping efficiency. Integrated into a scaled 4 nm SiN CTL, the silicon-doped BN barrier increases the program window without degrading erase characteristics and improves electron retention. These results indicate that an optimized Si-doped BN energy barrier enables XY-scaling without compromising memory performance.