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Dual metal gate process scheme for wide range work function modulation and reduced Fermi level pinning 
Year
2005 
Author
B. J. Cho, C. S. Park, P. W. Lwin, S. Y. Wong, J. Pu, W. S. Hwang, L. J. Tang, W. Y. Loh, and D. L. Kwong, 
Conference
3rd International Conference on Materials for Advanced Technologies, Symposium H 

B. J. Cho, C. S. Park, P. W. Lwin, S. Y. Wong, J. Pu, W. S. Hwang, L. J. Tang, W. Y. Loh, and D. L. Kwong, "Dual metal gate process scheme for wide range work function modulation and reduced Fermi level pinning", 3rd International Conference on Materials for Advanced Technologies, Symposium H: Silicon Microelectronics: Processing to Packaging, p. 41, MRS Singapore, July 2005.


July 2005.
MRS Singapore