Improving Charge Trap Efficiency with Boron Nitride Barrier for 3D V-NAND Flash Memory
- Year
- 2025
- Author
- Dae Hyun Kang
- Co-author
- Jae joong Jeong, Young keun Park, Dong Hun Sin, Han Mei Choi, and Byung Jin Cho
- Conference
- The 32th Korean Conference on Semiconductors, 2025
1Dae Hyun Kang,1Jae joong Jeong,1Young keun Park, 2Dong Hun Sin, 2Han Mei Choi, and 1Byung Jin Cho
1Korea Advanced Institute of Science andTechnology, 2Semiconductor R&D Center, Samsung Electronics