Conference

Home
Publication
Conference

Total 12건 1 페이지

2005
12

"Study of pure Ge on Si substrate for nMOSFET with HfAlO as gate dielectric and its thermal stability" C. C. Yeo, B. J. Cho, H. Yeo, F. Gao, S. J. Lee, C. Y. Yu, C. W. Liu, and L. J. Tang,, 3rd International Conference on Materials for Advanced Technologies, Symposium H, 2005
11

"Niobium oxide (Nb2O5) as a high-K dielectric for RF IC application" B. J. Cho, S. J. Kim, M. F. Li, C. Zhu, A. Chin, M. B. Yu, Y. Z. Xiong, and D. L. Kwong, 3rd International Conference on Materials for Advanced Technologies, Symposium H, 2005
10

"Dual metal gate process scheme for wide range work function modulation and reduced Fermi level pinning" B. J. Cho, C. S. Park, P. W. Lwin, S. Y. Wong, J. Pu, W. S. Hwang, L. J. Tang, W. Y. Loh, and D. L. Kwong,, 3rd International Conference on Materials for Advanced Technologies, Symposium H, 2005
9

"Role of Si in Fermi-level pinning phenomena in metal/high-K dielectric gate stack" M. S. Joo, B. J. Cho, N. Balasubramanian, and D. L. Kwong, 3rd International Conference on Materials for Advanced Technologies, Symposium H, 2005
8

"Formation of Phosphorus-doped shallow source/drain junctions for Ge MOSFET" D.Poon, L. S. Tan, B. J. Cho, A. Y. Du, and L. Chan, 3rd International Conference on Materials for Advanced Technologies, Symposium H, 2005
7

"Evaluation of SOHOS (polysilicon-oxide-high-K-oxide-silicon) structure for Flash memory device application" Y. N. Tan, B. J. Cho, W. K. Chim, W. K. Choi, M. S. Joo, and T. H. Ng,, 3rd International Conference on Materials for Advanced Technologies, Symposium G, 2005
6

"Integration of Dual Metal Gate/High-K dielectric Stacks for Fermi-Level Pinning Free" B. J. Cho, The 2nd International Workshop on Nanoscale Semiconductor Devices, 2005
5

"High Capacitance Density (>17fF/um2) Nb2O5-based MIM capacitors for Future RF IC Application" S. J. Kim, B. J. Cho, M. B. Yu, M. F. Li, Y. Z. Xiong, C. Zhu, A. Chin, and D. L. Kwong, 2005 Symposium on VLSI Technology, 2005
4

"Dual Metal Gate Process by Metal Substitution of Dopant-Free Polysilicon on High-K Dielectric" C. S. Park, B. J. Cho, W. S. Hwang, W. Y. Loh, L. J. Tang, and D. L. Kwong,, 2005 Symposium on VLSI Technology, 2005
3

"Technical challenges in Front-End Processes for next generation CMOS devices" B. J. Cho, AMSEA ET (Applied Materials South East Asia Engineering & Technology) Conference 2005, 2005
2

"Metal Electrode (Panel Presentation)" B. J. Cho, 2nd International Symposium on Advanced Gate Stack Technology, 2005
1

"Metal gate/high-K dielectric stack on Si cap/ultra-thin pure Ge epi/Si substrate" C. C. Yeo, M. H. Lee, C. W. Liu, K. J. Choi, T. W. Lee, and B. J. Cho, Proceedings on 2005 IEEE Conference on Electron Devices and Solid-State Circuits, 2005

검색