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Integration of Dual Metal Gate/High-K dielectric Stacks for Fermi-Level Pinning Free 
Year
2005 
Author
B. J. Cho 
Conference
The 2nd International Workshop on Nanoscale Semiconductor Devices 

B. J. Cho, "Integration of Dual Metal Gate/High-K dielectric Stacks for Fermi-Level Pinning Free", The 2nd International Workshop on Nanoscale Semiconductor Devices, p. 253-279, Daegu, Korea, June 2005. (Invited).


June 2005
Daegu, Korea,